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 HD74ALVC165245A
16-Bit Dual-supply Bus Transceiver with 3-state Outputs
REJ03D0157-0200Z Rev.2.00 Jan.07.2004
Description
The HD74ALVC165245A has 16 bus transceivers with three state outputs in a 48-pin package. When (DIR) is high, data flows from the A inputs to the B outputs, and when (DIR) is low, data flows from the B inputs to the A outputs. A and B bus are separated by making enable input (OE) high level. This 16-bit non-inverting bus transceiver uses two separate power-supply rails. And this product has two terminals (VCCA, VCCB), VCCA is connected with A bus side, VCCB is connected with control input and B bus. VCCA and VCCB are isolated. The A port is designed to track VCCA, which accepts voltages from 1.4 V to 3.6 V, and the B port is designed to track VCCB, which operates at 1.2 V to 2.7 V. Therefore, Bidirectional broad voltage conversion is possible. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation.
Rev.2.00, Jan.07.2004, page 1 of 17
HD74ALVC165245A
Features
* This product function as level shift transceiver that change VCCA input level to VCCB output level, VCCB input level to VCCA output level by providing different supply voltage to VCCA and VCCB. * VCCA = 1.4 V to 3.6 V, VCCB = 1.2 V to 2.7 V (VCCA > VCCB) * All control input VI (max) = 3.6 V (@VCCB = 0 V to 3.6 V) * All A bus side input outputs VI/O (max) = 3.6 V (@VCCA = 0 V or output off state) * All B bus side input outputs VI/O (max) = 3.6 V (@VCCB = 0 V or output off state) * High output current A bus side: 4 mA (@VCCA = 1.50.1 V) B bus side: 2 mA (@VCCB = 1.2 V) 6 mA (@VCCA = 1.80.15 V) 4 mA (@VCCB = 1.50.1 V) 18 mA (@VCCA = 2.50.2 V) 6 mA (@VCCB = 1.80.15 V) 24mA (@VCCA = 3.30.3 V) 18 mA (@VCCB = 2.50.2 V) * Ordering Information
Package Part Name HD74ALVC165245ATEL Package Type TSSOP-48Pin Package Code TTP-48DBV Abbreviation T Taping Abbreviation (Quantity) EL (1,000pcs / Reel)
Function Table
Inputs 1OE L L H 1DIR L H X Operation 1B1-1B8 data to 1A1-1A8 bus 1A1-1A8 data to 1B1-1B8 bus Z
Inputs 2OE L L H H: L: X: Z: High level Low level Immaterial High impedance 2DIR L H X Operation 2B1-2B8 data to 2A1-2A8 bus 2A1-2A8 data to 2B1-2B8 bus Z
Rev.2.00, Jan.07.2004, page 2 of 17
HD74ALVC165245A
Pin Arrangement
1DIR 1 1B1 2 1B2 3 GND 4 1B3 5 1B4 6 VCCB 7 1B5 8 1B6 9 GND 10 1B7 11 1B8 12 2B1 13 2B2 14 GND 15 2B3 16 2B4 17 VCCB 18 2B5 19 2B6 20 GND 21 2B7 22 2B8 23 2DIR 24
48 1OE 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCCA 41 1A5 40 1A6 39 GND 38 1A7 37 1A8 36 2A1 35 2A2 34 GND 33 2A3 32 2A4 31 VCCA 30 2A5 29 2A6 28 GND 27 2A7 26 2A8 25 2OE
(Top view)
Rev.2.00, Jan.07.2004, page 3 of 17
HD74ALVC165245A
Absolute Maximum Ratings
Item Supply voltage Input voltage*1 Input / output voltage Symbol VCCA, VCCB VI VI/O Ratings -0.5 to 4.6 -0.5 to 4.6 -0.5 to VCCA+0.5 -0.5 to 4.6 -0.5 to VCCB+0.5 -0.5 to 4.6 Input diode current Output diode current IIK IOK IO ICCA, ICCB, IGND -50 -50 50 Output current VCCA, VCCB, GND current 50 100 850 mA mA mW TSSOP mA mA Unit V V V DIR, OE A port output "H" or "L" A port output "Z" or VCCA : OFF B port output "H" or "L" B port output "Z" or VCCB : OFF VI < 0 VO < 0 VO > VCC+0.5 Conditions
Maximum power PT dissipation at Ta = 55C (in still air)*2 Storage temperature Notes: Tstg
-65 to 150
C
The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation was calculated using a junction temperature of 150C.
Rev.2.00, Jan.07.2004, page 4 of 17
HD74ALVC165245A
Recommended Operating Conditions
Item Supply voltage Symbol VCCB VCCA Input / output voltage VI VI/O Ratings 1.2 to 2.7 1.4 to 3.6 0 to 3.6 0 to VCCA 0 to 3.6 0 to VCCB 0 to 3.6 Output current IOHB -2 -4 -6 -18 IOHA -4 -6 -18 -24 IOLB 2 4 6 18 IOLA 4 6 18 24 Input transition rise or fall time Operating temperature t / v Ta 10 -40 to 85 ns / V C mA V DIR, OE A port output "H" or "L" A port output "Z" or VCCA : OFF B port output "H" or "L" B port output "Z" or VCCB : OFF VCCB = 1.2 V VCCB = 1.50.1 V VCCB = 1.80.15 V VCCB = 2.50.2 V VCCA = 1.50.1 V VCCA = 1.80.15 V VCCA = 2.50.2 V VCCA = 3.30.3 V VCCB = 1.2 V VCCB = 1.50.1 V VCCB = 1.80.15 V VCCB = 2.50.2 V VCCA = 1.50.1 V VCCA = 1.80.15 V VCCA = 2.50.2 V VCCA = 3.30.3 V Unit V Conditions
Note: Unused or floating inputs must be held high or low.
Rev.2.00, Jan.07.2004, page 5 of 17
HD74ALVC165245A
Block Diagram
1 48 1B1 2 47 1A1 1OE
1DIR
To seven other channels
2DIR
24 25 2OE
2B1
13 36 2A1
To seven other channels
Rev.2.00, Jan.07.2004, page 6 of 17
HD74ALVC165245A
Electrical Characteristics
(Ta = -40 to 85C)
Item Input voltage Symbol VIHB VCCB (V) 1.2 1.50.1 1.80.15 2.50.2 VIHA 1.2 1.2 to 1.6 VCCA (V) 1.4 to 3.6 Min Max Unit Test Conditions V B port Control input
VCCBx0.75 VCCBx0.65 1.6 VCCAx0.70 VCCAx0.65 1.6 2.0 VCCB-0.2 0.9 VCCBx0.25 VCCBx0.30 VCCBx0.35 0.7 VCCAx0.30 VCCAx0.35 0.7 0.8
1.65 to 3.6 VCCBx0.70 2.3 to 3.6 3.0 to 3.6 1.50.1 1.80.15
A port
1.2 to 1.95 2.50.2 1.2 to 2.7 VILB 1.2 1.50.1 1.80.15 2.50.2 VILA 1.2 1.2 to 1.6 3.30.3 1.4 to 3.6
B port Control input
1.65 to 3.6 2.3 to 3.6 3.0 to 3.6 1.50.1 1.80.15
A port
1.2 to 1.95 2.50.2 1.2 to 2.7 Output voltage VOHB 1.2 3.30.3 1.4 to 3.6
V
IOH = -100 A IOH = -2 mA IOH = -100 A IOH = -4 mA IOH = -100 A IOH = -6 mA IOH = -100 A IOH = -18 mA IOH = -100 A IOH = -4 mA IOH = -100 A IOH = -6 mA IOH = -100 A IOH = -18 mA IOH = -100 A IOH = -24 mA
1.50.1
1.65 to 3.6 VCCB-0.2 1.1 2.3 to 3.6 VCCB-0.2 1.25 VCCB-0.2 1.7 VCCA-0.2 1.1 VCCA-0.2 1.25 VCCA-0.2 1.7 VCCA-0.2 2.2
1.80.15
2.50.2
3.0 to 3.6
VOHA
1.2
1.50.1
1.2 to 1.6
1.80.15
1.2 to 1.95 2.50.2
1.2 to 2.7
3.30.3
Rev.2.00, Jan.07.2004, page 7 of 17
HD74ALVC165245A
Electrical Characteristics (Cont)
(Ta = -40 to 85C)
Item Output voltage Symbol VOLB VCCB (V) 1.2 VCCA (V) 1.4 to 3.6 Min 1.50.1 1.65 to 3.6 1.80.15 2.3 to 3.6 2.50.2 3.0 to 3.6 VOLA 1.2 1.50.1 1.2 to 1.6 1.80.15 1.2 to 1.95 2.50.2 1.2 to 2.7 3.30.3 Input current Off state output current Output leak current Quiescent supply current IIN IOZ IOFF ICCB ICCA ICCB ICCA Increase in ICC per Input*1 ICCB 2.7 2.7 0 2.7 2.7 2.7 2.7 2.7 3.6 3.6 0 3.6 3.6 3.6 3.6 3.6 Max 0.2 0.3 0.2 0.3 0.2 0.3 0.2 0.6 0.2 0.3 0.2 0.3 0.2 0.6 0.2 0.55 5.0 10 10 20 20 20 20 750 A A A A A Unit Test Conditions V IOL = 100 A IOL = 2 mA IOL = 100 A IOL = 4 mA IOL = 100 A IOL = 6 mA IOL = 100 A IOL = 18 mA IOL = 100 A IOL = 4 mA IOL = 100 A IOL = 6 mA IOL = 100 A IOL = 18 mA IOL = 100 A IOL = 24 mA VI = GND or VCCB Control input VIN = VIH or VIL VIN, VOUT = 0 to 3.6 V IO (B port) = 0, AIN = VCCA or GND IO (A port) = 0, BIN = VCCB or GND VCCB (VIN, VOUT) 3.6 V VCCA (VIN, VOUT) 3.6 V B port or control input One input at VCCB-0.6 V Other input at VCCB or GND A port One input at VCCA-0.6 V Other input at VCCA or GND
ICCA
2.7
3.6
750
A
Notes: For condition shown as Min or Max use the appropriate values under recommended operating conditions. 1. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
Rev.2.00, Jan.07.2004, page 8 of 17
HD74ALVC165245A
Capacitance
(Ta = 25C)
Item Control Input capacitance Input / output capacitance Symbol VCCA (V) CIN CI/O 3.3 3.3 VCCB (V) 2.5 2.5 Min Typ 4 9 Max Unit Test Conditions pF pF VI = VCCB or GND A port, VI = VCCA or GND, B port, VI = VCCB or GND
Switching Characteristics
(Ta = -40 to 85C) * VCCB = 2.50.2 V, VCCA = 3.30.3 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ 0.6 0.6 0.8 0.8 0.6 0.6 0.8 0.8 0.6 0.6 0.8 0.8 Typ Max 4.0 4.0 4.4 4.4 4.0 4.0 4.6 4.6 4.8 4.8 4.4 4.4 ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
Rev.2.00, Jan.07.2004, page 9 of 17
HD74ALVC165245A
Switching Characteristics (cont)
(Ta = -40 to 85C) * VCCB = 1.80.15 V, VCCA = 3.30.3 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ 0.6 0.6 1.5 1.5 0.6 0.6 1.5 1.5 0.6 0.6 0.8 0.8 Typ Max 5.1 5.1 6.2 6.2 5.1 5.1 8.2 8.2 5.6 5.6 4.5 4.5 ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
* VCCB = 1.50.1 V, VCCA = 3.30.3 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ 0.6 0.6 1.5 1.5 0.6 0.6 1.5 1.5 0.6 0.6 1.5 1.5 Typ Max 5.5 5.5 5.5 5.5 6.0 6.0 10.0 10.0 6.0 6.0 6.0 6.0 ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
Rev.2.00, Jan.07.2004, page 10 of 17
HD74ALVC165245A
Switching Characteristics (cont)
(Ta = -40 to 85C) * VCCB = 1.2 V, VCCA = 3.30.3 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ Typ 3.5 3.5 4.5 4.5 5.5 5.5 9.0 9.0 4.5 4.5 5.5 5.5 Max ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
* VCCB = 1.80.15 V, VCCA = 2.50.2 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ 0.8 0.8 1.5 1.5 0.8 0.8 1.5 1.5 0.8 0.8 0.8 0.8 Typ Max 5.5 5.5 5.8 5.8 5.3 5.3 8.3 8.3 5.2 5.2 4.6 4.6 ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
Rev.2.00, Jan.07.2004, page 11 of 17
HD74ALVC165245A
Switching Characteristics (cont)
(Ta = -40 to 85C) * VCCB = 1.50.1 V, VCCA = 2.50.2 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ 1.5 1.5 1.5 1.5 0.8 0.8 1.5 1.5 1.5 1.5 1.5 1.5 Typ Max 6.0 6.0 6.0 6.0 7.0 7.0 10.0 10.0 6.0 6.0 6.0 6.0 ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
* VCCB = 1.2 V, VCCA = 2.50.2 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ Typ 3.5 3.5 4.5 4.5 6.0 6.0 9.0 9.0 5.0 5.0 5.5 5.5 Max ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
Rev.2.00, Jan.07.2004, page 12 of 17
HD74ALVC165245A
Switching Characteristics (cont)
(Ta = -40 to 85C) * VCCB = 1.50.1 V, VCCA = 1.80.15 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 Typ Max 7.0 7.0 7.0 7.0 8.0 8.0 10.0 10.0 7.0 7.0 6.0 6.0 ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
* VCCB = 1.2 V, VCCA = 1.80.15 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ Typ 4.5 4.5 5.0 5.0 6.5 6.5 9.0 9.0 5.5 5.5 5.5 5.5 Max ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
Rev.2.00, Jan.07.2004, page 13 of 17
HD74ALVC165245A
Switching Characteristics (cont)
(Ta = -40 to 85C) * VCCB = 1.2 V, VCCA = 1.50.1 V
Item Propagation delay time Symbol Min tPLH tPHL tPLH tPHL Output enable time tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ Typ 5.5 5.5 5.5 5.5 7.5 7.5 9.0 9.0 6.5 6.5 5.5 5.5 Max ns CL = 30 pF RL = 500 OE B OE A ns CL = 30 pF RL = 500 OE B OE A Unit ns Test conditions CL = 30 pF RL = 500 A B From(Input) B To(Output) A
Operating Characteristics
Item Power dissipation capacitance Symbol VCCA (V) CPD 3.3 VCCB (V) 2.5 Min Typ 40 Max Unit Test Conditions pF f = 10 MHz CL = 0
Power-up considerations
Level-translation devices offer an opportunity for successful mixed-voltage signal design. A proper power-up sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other anomalies caused by improperly biased device pins. Take these precautions to guard against such power-up problems. 1. Connect ground before any supply voltage is applied. 2. Next, power up the control side of the device. (Power up of VCCB is first. Next power up is VCCA.) 3. Tie OE to VCCB with a pullup resistor so that it ramps with VCCB. 4. Depending on the direction of the data path, DIR can be high or low. If DIR high is needed (A data to B bus), ramp it with VCCB. Otherwise, DIR low is needed (B data to A bus), ramp it with GND.
Rev.2.00, Jan.07.2004, page 14 of 17
HD74ALVC165245A Test Circuit
500
S1
See under table
OPEN GND
*1
CL = 30 pF
500
Load circuit for outputs
Symbol
VCCB = 2.50.2 V = 1.80.15 V = 1.50.1 V = 1.2 V VCCA = 3.30.3 V B/OE to A
VCCB = 1.80.15 V = 1.50.1 V = 1.2 V VCCA = 2.50.2 V
VCCB = 1.50.1 V = 1.2 V VCCA = 1.80.15 V VCCB = 1.2 V VCCA = 1.50.1 V A/OE to B OPEN GND 2 x VCCB
A/OE to B B/OE to A OPEN GND 2 x VCCB OPEN GND 2 x VCCA
A/OE to B B/OE to A OPEN GND 2 x VCCB OPEN GND 2 x VCCA
A/OE to B B/OE to A OPEN GND 2 x VCCB OPEN GND 2 x VCCA
t PLH / tPHL t ZH / t HZ t ZL / t LZ
OPEN GND 6V
Note: 1. CL includes probe and jig capacitance.
Waveforms - 1
tr 90 % Input 10 % t PLH VM 90 % VM 10 % t PHL V OH Output VM VM V OL GND tf VIH
Rev.2.00, Jan.07.2004, page 15 of 17
HD74ALVC165245A Waveforms - 2
tf 90 % Output Control VM 10 % t ZL 10 % t LZ VOH Waveform - A t ZH VM VX t HZ VY Waveform - B VM GND V OL V OH VM GND tr 90 % VIH
Symbol VIH VM VX VY
VCC 3.30.3 V 2.7 V 1.5 V VOL+0.3 V VOH-0.3 V 2.50.2 V VCC 1/2 VCC 1.80.15 V VCC 1/2 VCC 1.50.1 V VCC 1/2 VCC VOL+0.1 V VOH-0.1 V 1.2 V VCC 1/2 VCC VOL+0.1 V VOH-0.1 V
VOL+0.15 V VOL+0.15 V VOH-0.15 V VOH-0.15 V
Notes: 1. All input pulses are supplied by generators having the following characteristics: PRR 10MHz, Zo = 50 , tr 2.0 ns, tf 2.0 ns. 2. Waveform-A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform-B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.2.00, Jan.07.2004, page 16 of 17
HD74ALVC165245A
Package Dimensions
As of January, 2002
12.5 12.7 Max 48 25
Unit: mm
1 *0.19 0.05
0.50
24
0.08 M 8.10 0.20 0 - 8
6.10
1.0
0.65 Max
*0.15 0.05
0.10
0.10 0.05
1.20 Max
0.50 0.1
*Pd plating
Package Code JEDEC JEITA Mass (reference value)
TTP-48DBV -- -- 0.20 g
Rev.2.00, Jan.07.2004, page 17 of 17
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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